View IRPLMB1E_2004676.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

data sheet no. pd60212 revc features ? 600v half bridge driver ? ? ? ? ? integrated bootstrap fet ? ? ? ? ? adaptive zero-voltage switching (zvs) ? ? ? ? ? internal crest factor over-current protection ? ? ? ? ? 0 to 6vdc voltage controlled oscillator ? ? ? ? ? programmable minimum frequency ? micropower startup current (80ua) ? internal 15.6v zener clamp on vcc ? small dip8/so8 package ? also available lead-free (pbf) description the ir2520d(s) is a complete adaptive ballast controller and 600v half-bridge driver integrated into a single ic for fluorescent lighting applications. the ic includes adaptive zero-voltage switching (zvs), internal crest factor over-current protection, as well as an integrated bootstrap fet. the heart of this ic is a voltage con- trolled oscillator with externally programmable minimum frequency. all of the necessary ballast features are integrated in a small 8-pin dip or soic package. adaptive ballast control ic ir2520d(s) & (pbf) www.irf.com 1 typical application diagram packages 8 lead soic ir2520ds 8-lead pdip ir2520d 1 2 3 4 ir2520d vcc com vco lo vs ho vb 8 7 6 5 fmin mhs cbs cvcc rfmin f1 cbus rsupply dcp2 dcp1 lres cres csnub cvco br1 lf cf mls cdc spiral cfl l1 l2
ir2520d(s)& (pbf) 2 www.irf.com symbol definition min. max. units v b high side floating supply voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v lo low side output voltage -0.3 v cc + 0.3 i vco voltage controlled oscillator input current (note 1) -5 + 5 ma i cc supply current (note 2) -25 25 ma dv s /dt allowable offset voltage slew rate -50 50 v/ns p d package power dissipation @ t a +25 c 8-lead pdip 1 pd=(t jmax -t a )rth ja 8-lead soic 0.625 rth ja thermal resistance, junction to ambient 8-lead pdip 125 8-lead soic 200 t j junction temperature -55 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com, all currents are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c w c/w note 1: this ic contains a zener clamp structure between the chip vco and com, which has a nominal breakdown voltage of 6v. please note that this pin should not be driven by a dc, low impedance power source greater than 6v. note 2: this ic contains a zener clamp structure between the chip vcc and com, which has a nominal breakdown voltage of 15.6v. please note that this supply pin should not be driven by a dc, low impedance power source greater than the vclamp specified in the electrical characteristics section. note 3: enough current should be supplied into the vcc pin to keep the internal 15.6v zener clamp diode on this pin regulating its voltage, vclamp. recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v bs high side floating supply voltage v cc - 0.7 v clamp v s steady state high side floating supply offset voltage -1 600 v cc supply voltage v ccuv+ v clamp i cc supply current note 3 10 ma r fmin minimum frequency setting resistance 20 140 k ? v vco vco pin voltage 0 5 v t j junction temperature -25 125 c v
ir2520d(s) & (pbf) www.irf.com 3 electrical characteristics v cc = v bs = v bias = 14v +/- 0.25v, c lo =c ho =1000pf, r fmin = 82k ? and t a = 25 c unless otherwise specified. symbol definition min. t yp. max. units test conditions v ccuv+ v cc and v bs supply undervoltage positive going 11.4 12.6 13.8 v cc rising from ov threshold v ccuv- v cc and v bs supply undervoltage negative going 9.0 10.0 11.0 threshold v uvhys v cc supply undervoltage lockout hysteresis 2.7 i qccuv uvlo quiescent current 45 80 v cc = 10v i qccflt fault mode quiescent current 100 i cchf v cc supply current f=85khz 4.5 v vco =0v i cclf v cc supply current f=35khz 2.0 v vco =6v v clamp v cc zener clamp voltage 14.4 15.4 v i cc = 10ma i qbs 0 quiescent v bs supply current 80 150 v cc =10v, v bs =14v i qbsuv quiescent v bs supply current 20 40 v cc =10v, v bs =7v v bsuv+ vbs supply undervoltage positive going threshold 7.7 9.0 10.3 v v bsuv- vbs supply undervoltage negative going threshold 6.8 8.0 9.2 v i lk offset supply leakage current 50 av b = v s = 600v f (min) minimum oscillator frequency (note 4) 29.6 34 38.2 v vco =6v f ( max) maximum oscillator frequency (note 4) 67 86 96 v vco =0v d oscillator duty cycle 50 % dt lo lo output deadtime 2.0 dt ho ho output deadtime 2.0 i vcoqs i vco quick start 50 v vco =0v i vcofs i vco frequency sweep 0.8 1.3 1.7 v vco =2v i vco_ 5v i vco when vco is at 5v 1.1 v vco_ max maximum vco voltage 6 v v lo=low lo output voltage when lo is low com v ho=low ho output voltage when ho is low com v lo=high lo output voltage when lo is high vcc v ho=high ho output voltage when ho is high vcc t rise turn on rise time 150 230 t fall turn off fall time 75 120 io+ output source short circuit pulsed current 140 ma io- output sink short circuit pulse current 230 ma note 4: frequency shown is nominal for r fmin =82k ? . frequency can be programmed higher or lower with the value of r fmin . s khz a v a ma ns mv a supply characteristics floating supply characteristics oscillator i/o characteristics gate driver output characteristics
ir2520d(s)& (pbf) 4 www.irf.com lead definitions symbol description vcc supply voltage com ic power and signal ground fmin minimum frequency setting vco voltage controlled oscillator input lo low-side gate driver output vs high-side floating return ho high-side gate driver output vb high-side gate driver floating supply 1 2 3 4 ir2520d(s) vcc com vco lo vs ho vb 8 7 6 5 fmin electrical characteristics v cc = v bs = v bias = 14v +/- 0.25v, c lo =c ho =1000pf, r fmin = 82k ? and t a = 25 c unless otherwise specified. symbol defi nition min. typ. max. units t est conditions v vco_run vco voltage when entering run mode 4.8 v cscf crest factor peak-to-average fault factor 5.0 n/a v s offset = 0.5v vs_ maximum crest factor vs offset voltage 3.0 v offset_max v vcosd v vco shutdown voltage 0.74 0.82 0.91 v v fmin fmin lead voltage during normal operation 4.8 5.1 5.4 v v fminflt fmin lead voltage during fault mode 0 v ibs1 vb current 30 70 c bs = 0.1uf, v s =0v ibs2 vb current 10 20 vbs = 10v bootstrap fet minimum frequency setting characteristics protection characteristics ma
ir2520d(s) & (pbf) www.irf.com 5 block diagram all values are typical lo vcc 5 ho 7 6 8 vs vb bootstrap fet control bootstrap fet high-voltage well uvlo level-shift fets q s r2 r1 vco fmin 4 3 driver logic 5v 5v i fmin i fmax i dt r rfmin i fmin = ct 5v fault logic q s1 r2 q s2 r1 set rst 1v 0.8v 4.8v uvlo vcc com 1 2 15.6v 300ns pgen q s rq 5.1v 120ua q t rq level shift pgen hin lin vs-sensing fet averaging circuit x 5 vcc i qs i vco 1us blank
ir2520d(s)& (pbf) 6 www.irf.com state diagram all values are typical power turned on vccuv mode vcc > 12.6v (vccuv+) vcc < 10v (vccuv-) v = 0v vcc < 10v (vccuv-) i qcc ? 45 -bridge off 1 / 2 crest factor > 5.0 (cscf) or v < 0.82v (v ) v = 0v frequency sweep mode vco ramps up, frequency ramps down crest factor disabled v = 5.1v run mode v = 6.0v, frequency = fmin crest factor enabled zvs enabled if non-zvs detected then v decreases and frequency increases to maintain zvs fault mode v = 0v zvs disabled vco vco fmin fmin vco fmin vco vcosd a v >4.8v vco (v _run) vco -bridge off 1 / 2 v = 0v vco 100 qccflt ? i a
ir2520d(s) & (pbf) www.irf.com 7 functional description under-voltage lock-out mode the under-voltage lock-out mode (uvlo) is defined as the state the ir2520d is in when vcc is below the turn-on threshold of the ic. the ir2520d uvlo is designed to main- tain an ultra-low supply current (i qccuv <80ua), and to guarantee that the ir2520d is fully functional before the high- and low-side output gate drivers are activated. the vcc capacitor, cvcc, is charged by current through sup- ply resistor, rsupply, minus the start-up current drawn by the ir2520d (figure 1). this resistor is chosen to provide sufficient current to supply the ir2520d from the dc bus. once the capacitor voltage on vcc reaches the start-up threshold, v ccuv + , the ir2520d turns on and ho and lo start oscillating. capacitor cvcc should be large enough to hold the voltage at vcc above the v ccuv + threshold for one half-cycle of the line voltage or until the external auxil- iary supply can maintain the required supply voltage and current to the ic. an internal bootstrap mosfet between vcc and vb and external supply capacitor, cbs, determine the supply volt- age for the high-side driver circuitry. an external charge pump circuit consisting of capacitor csnub and diodes dcp1 and dcp2, comprises the auxiliary supply voltage for the low-side driver circuitry. to guarantee that the high-side supply is charged up before the first pulse on pin ho, the first pulse from the output drivers comes from the lo pin. lo may oscillate several times until vb-vs exceeds the high-side uvlo rising threshold, v bsuv+ (9 volts), and the fig. 2 frequency sweep circuitry mode circuitry fig. 1 start-up circuitry vcc com vco lo vs ho vb fmin mhs cbs cvcc rfmin rsupply dcp2 dcp1 csnub cvco mls dcbus(+) dcbus(-) 8 7 6 5 1 2 3 4 to load load return 15.6v clamp high- and low- side driver bootstrap fet driver uvlo vcc high-side driver is enabled. during uvlo mode, the high- and low-side gate driver outputs, ho and lo, are both low and pin vco is pulled down to com for resetting the starting frequency to the maximum. frequency sweep mode when vcc exceeds v ccuv + threshold, the ir2520d enters frequency sweep mode. an internal current source (figure 2) charges the external capacitor on pin vco, cvco, and the voltage on pin vco starts ramping up linearly. an addi- tional quick-start current (i vcoqs ) is also connected to the vco pin and charges the vco pin initially to 0.85v. when the vco voltage exceeds 0.85v, the quick-start current is then disconnected internally and the vco voltage continues to charge up with the normal frequency sweep current source (i vcofs ) (figure 3). this quick-start brings the vco voltage quickly to the internal range of the vco. the frequency ramps down towards the resonance frequency of the high-q bal- last output stage causing the lamp voltage and load current to increase. the voltage on pin vco continues to increase and the frequency keeps decreasing until the lamp ignites. if the lamp ignites successfully, the voltage on pin vco continues to increase until it internally limits at 6v (v vco_max ). the frequency stops decreasing and stays at the minimum fre- quency as programmed by an external resistor, rfmin, on pin fmin. the minimum frequency should be set below the high-q resonance frequency of the ballast output stage to ensure that the frequency ramps through resonance for lamp ignition (figure 4). the desired preheat time can be set by adjusting the slope of the vco ramp with the external capaci- tor cvco. vcc com vco lo vs ho vb fmin mhs cbs cvcc rfmin rsupply dcp2 dcp1 csnub cvco mls dcbus(+) dcbus(-) 8 7 6 5 1 2 3 4 to load load return 15.6v clamp high- and low- side driver bootstrap fet driver vco
ir2520d(s)& (pbf) 8 www.irf.com v vco 4.8v 0.85v 6v freq fmax fmin frequency sweep mode run mode fig. 3 ir2520d frequency sweep mode timing diagram. high -q low -q start ignition run vout vin frequency p r e h e a t fmax fmin fig. 4 resonant tank bode plot with lamp operating points. run mode the ir2520d enters run mode when the voltage on pin vco exceeds 4.8v (v vco_run ). the lamp has ignited and the ballast output stage becomes a low-q, series-l, paral- lel-rc circuit. also, the vs sensing and fault logic blocks (figure 5) both become enabled for protection against non- zvs and over-current fault conditions. the voltage on the vco pin continues to increase and the frequency deceases further until the vco pin voltage limits at 6v (v vco_max ) and the minimum frequency is reached. the resonant in- ductor, resonant capacitor, dc bus voltage and minimum frequency determine the running lamp power. the ic stays at this minimum frequency unless non-zvs occurs at the vs pin, a crest factor over-current condition is detected at the vs pin, or vcc decreases below the uvlo- threshold (see state diagram). vcc com vco lo vs ho vb fmin mhs cbs cvcc rfmin rsupply dcp2 dcp1 csnub cvco mls dcbus(+) dcbus(-) 8 7 6 5 1 2 3 4 to load load return 15.6v clamp high- and low- side driver bootstrap fet driver vco fault logic vs sense fig. 5 ir2520d run mode circuitry. non zero-voltage switching (zvs) protection during run mode, if the voltage at the vs pin has not slewed entirely to com during the dead-time such that there is voltage between the drain and source of the external low- side half-bridge mosfet when lo turns-on, then the system is operating too close to, or, on the capacitive side of, resonance. the result is non-zvs capacitive-mode switching that causes high peak currents to flow in the half-bridge mosfets that can damage or destroy them (figure 6). this can occur due to a lamp filament failure(s),
ir2520d(s) & (pbf) www.irf.com 9 v lo v ho i mls too close to resonance. hard-switching and high peak mosfet currents! ! i mhs v vs i l v vco frequency shifted higher to maintain zvs. ! ! lamp removal (open circuit), a dropping dc bus during a mains brown-out or mains interrupt, lamp variations over time, or component variations. to protect against this, an internal high-voltage mosfet is turned on at the turn-off of ho and the vs-sensing circuit measures vs at each rising edge of lo. if the vs voltage is non-zero, a pulse of current is sinked from the vco pin (figures 5 and 6) to slightly discharge the external capacitor, cvco, causing the frequency to increase slightly. the vco capacitor then charges up during the rest of the cycle slowly due to the internal current source. fig. 6 ir2520d non-zvs protection timing diagram. the frequency is trying to decrease towards resonance by charging the vco capacitor and the adaptive zvs cir- cuit ?nudges? the frequency back up slightly above reso- nance each time non-zvs is detected at the turn-on of lo. the internal high-voltage mosfet is then turned off at the turn-off of lo and it withstands the high-voltage when vs slews up to the dc bus potential. the circuit then remains in this closed-loop adaptive zvs mode during running and maintains zvs operation with changing line conditions, com- ponent tolerance variations and lamp/load variations. dur- ing a lamp removal or filament failure, the lamp resonant tank will be interrupted causing the half-bridge output to go open circuit (figure 7). this will cause capacitive switching (hard-switching) resulting in high peak mosfet currents that can damage them. the ir2520d will increase the fre- quency in attempt to satisfy zvs until the vco pin de- creases below 0.82v (v vcosd ). the ic will enter fault mode and latch the lo and ho gate driver outputs ?low? for turning the half-bridge off safely before any damage can occur to the mosfets. v lo v ho v vs i mls i mhs ! capacitive switching. hard-switching and high peak mosfet currents! v vco frequency shifted higher until vco < 0.82v. lo and ho are latched low before damage occurs to mosfets. ! ! run mode fault mode 0.85v crest factor over-current protection during normal lamp ignition, the frequency sweeps through resonance and the output voltage increases across the resonant capacitor and lamp until the lamp ignites. if the lamp fails to ignite, the resonant capacitor voltage, the inductor voltage and inductor current will continue to increase until the inductor saturates or the output voltage exceeds the maximum voltage rating of the resonant capacitor or inductor. the ballast must shutdown before damage occurs. to protect against a lamp non-strike fault condition, the ir2520d uses the vs-sensing circuitry (figure 5) to also measure the low-side half-bridge mosfet current for detecting an fig. 7 lamp removal or open filament fault condition timing diagram
ir2520d(s)& (pbf) 10 www.irf.com over-current fault. by using the rdson of the external low- side mosfet for current sensing and the vs-sensing circuitry, the ir2520d eliminates the need for an additional current sensing resistor, filter and current-sensing pin. to cancel changes in the rdson value due to temperature and mosfet variations, the ir2520d performs a crest factor measurement that detects when the peak current exceeds the average current by a factor of 5 (cscf). measuring the crest factor is ideal for detecting when the inductor saturates due to excessive current that occurs in the resonant tank when the frequency sweeps through resonance and the lamp does not ignite. when the vco voltage ramps up for the first time from zero, the resonant tank current and voltages increase as the frequency decreases towards resonance (figure 8). if the lamp does not ignite, the inductor current will eventually saturate but the crest factor fault protection is not active until the vco voltage exceeds 4.8v (v vco_run ) for the first time. the frequency will continue decreasing to the capacitive side of resonance towards the minimum frequency setting and the resonant tank current and voltages will decrease again. when the vco voltage exceeds 4.8v (v vco_run ), the ic enters run mode and the non-zvs protection and crest factor protection are both enabled. the non-zvs protection will increase the frequency again cycle-by-cycle towards resonance from the capacitive side. the resonant tank current will increase again as the frequency nears resonance until the inductor saturates again. the crest factor protection is now enabled and measures the instantaneous voltage at the vs pin only during the time when lo is ?high? and after an initial 1us blank time from the rising edge of lo. the blank time is necessary to prevent the crest factor protection circuit from reacting to a non- zvs condition. an internal averaging circuit averages the instantaneous voltage at the vs pin over 10 to 20 switching cycles of lo. during run mode, the first time the inductor saturates when lo is ?high? (after the 1us blank time) and the peak current exceeds the average by 5 (cscf), the ir2520d will enter fault mode and both lo and ho outputs will be latched ?low?. the half-bridge will be safely disabled before any damage can occur to the ballast components. the crest factor peak-to-average fault factor varies as a function of the internal average (figure 20). the maximum internal average should be below 3.0 volts. should the average exceed this amount, the multiplied average voltage can exceed the maximum limit of the vs sensing circuit and the vs sensing circuit will no longer detect crest factor lo i l v vco 4.6v inductive side of resonance capacitive side of resonance frequency sweep mode run mode fault mode i mls avg*5 inductor saturation fig. 8 crest factor protection timing diagram fault mode during run mode, should the vco voltage decrease below 0.82v (v vcosd ) or a crest factor fault occur, the ir2520d will enter fault mode (see state diagram). the lo and ho gate driver outputs are both latched ?low? so that the half- bridge is disabled. the vco pin is pulled low to com and the fmin pin decreases from 5v to com. vcc draws micro-power current (i ccflt ) so that vcc stays at the clamp voltage and the ic remains in fault mode without the need for the charge-pump auxiliary supply. to exit fault mode and return to frequency sweep mode, vcc must be cycled below the uvlo- threshold and back above the uvlo+ threshold. faults. this can occur when a half-bridge mosfet is selected that has an rdson that is too large for the application causing the internal average to exceed the maximum limit.
ir2520d(s) & (pbf) www.irf.com 11 0 10 20 30 40 50 -25 0 25 50 75 100 125 temperature(c) iqccuv(ua ) fig. 9 vccuv+/- vs temp fig. 10 iqccuv vs temp vcc=10v, vco=0v fig. 11 vbsuv+/- vs temp fig. 12 iqbsuv vs temp 6 8 10 12 14 16 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) vccuv+,-(v vccuv+ vccuv- 6 8 10 12 -25 0 25 50 75 100 125 temperature(c) vbsuv+,-(v) vbsuv+ vbsuv- 0 20 40 60 80 10 0 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) iqbsuv(ua)
ir2520d(s)& (pbf) 12 www.irf.com 0 10 20 30 40 50 60 70 80 90 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) freq(khz ) 20 40 60 80 100 120 140 fig. 16 freq vs vcc vs temp vvco=0v fig. 15 freq vs vvco vs temp vcc=14v fig. 14 frequency vs rfmin vs temp vvco=6v fig. 13 frequency vs temp remin=82k 0 10 20 30 40 50 60 70 80 90 10 0 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) frequency(khz ) vvco=0v vvco=5v 0 10 20 30 40 50 60 70 80 90 10 0 12 34 56 vco(v) frequency(khz ) -2 5 25 75 12 5 86 87 88 89 90 91 92 93 12 13 14 15 16 temperature(c) frequency(khz) ) -2 5 25 75 12 5 k k k k k k k
ir2520d(s) & (pbf) www.irf.com 13 0 0. 2 0. 4 0. 6 0. 8 1 1. 2 1. 4 1. 6 1. 8 2 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) ivcofs(ua ) fig. 19 vvcomax vs temp fig. 20 cscf vs offset fig. 17 dtho, dtlo vs temp vco=0v fig. 18 ivco_fs vs temp 5 5. 5 6 6. 5 7 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) vvco_max (v) 0 1 2 3 4 5 6 7 8 9 10 0. 20. 40. 60. 81 v s offset( v ) vcsc f 0 0. 5 1 1. 5 2 2. 5 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) td (us ) tdho tdlo
ir2520d(s)& (pbf) 14 www.irf.com fig. 24 ibs1 vs temp 0 20 40 60 80 10 0 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) ibs1(ma) fig. 21 cscf vs temp vs_offset=0.5v fig. 22 vvco_sd vs temp fig. 23 vfmin vs temp vco=0v, rfmin=82k 0 0. 25 0. 5 0. 75 1 1. 25 1. 5 -2 5 0 2 5 50 75 10 0 12 5 temperature (c) vvco_sd (v) 0 1 2 3 4 5 6 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) vfmin(v ) () 0 2 4 6 8 10 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) csc f
ir2520d(s) & (pbf) www.irf.com 15 fig. 26 ibs2 vs temp 0 5 10 15 20 25 30 -2 5 0 2 5 50 75 10 0 12 5 temperature(c) ibs2(ma)
ir2520d(s)& (pbf) 16 www.irf.com ir2520ds 8-lead soic 01-6027 01-0021 11 (ms-012aa) 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & toleranc ing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mold protrusions no t to exc eed 0.25 [.010]. 7 dimension is the length of lead for soldering to a substrate. mold protrusions no t to exc eed 0.15 [.006]. 0.25 [.010] cab e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 basic 0.635 basic 01-6014 01-3003 01 (ms-001ab) ir2520d 8-lead pdip case outlines
ir2520d(s) & (pbf) www.irf.com 17 leadfree part 8-lead pdip ir2520d order ir2520dpbf 8-lead soic ir2520ds order ir2520dspbf leadfree part marking information order information lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code basic part (non-lead free) 8-lead pdip ir2520d order ir2520d 8-lead soic ir2520ds order ir2520ds ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 this product has been qualified per industrial level msl-3 data and specifications subject to change without notice. 3/1/2005

▲Up To Search▲

Price & Availability of IRPLMB1E

	To Download IRPLMB1E Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .